Hi Everyone,
I am new to p4 and computer networks switches. I am trying to understand the difference in performance between different P4 software switches and what experiments/scenarios will highlight why researchers will favor this software switch over another for a particular area of experiment as this software switch’s hardware counterpart will also prove true in a similar experiment. Therefore, I like to ask for your input on this, please.
I also really appreciate it if someone can point me to a list of P4 software switches (I am aware about SONIC and BMv2) used by the community for research as I am unable to find any comparison studies relating to this.
Thank you in advance.
Disclaimer: This is my personal opinion and no criticism on people that focus on research with software targets.
To be honest, research besides prototyping with software switches (to see if the approach is feasible in P4 in general) is not that useful. While we did a rather detailed survey about P4 research (A survey on data plane programming with P4: Fundamentals, advances, and applied research - ScienceDirect) we noticed that many researchers use software switches. However, based on my own review experience, methods that are only evaluated on software switches do not have meaningful impact as networking today is done at speeds that can never be reached by software targets. Therefore, I’d focus on hardware targets if I were you (Tofino, FPGA targets). I would only focus on software switches when your use cases explicitly have low speed requirements.
One main problem with software targets is, that while they may run algorithms programmed with P4, the same algorithm may not work on a hardware target due to hardware related limitations. There are many fancy P4 based mechanisms on software switches that do fancy stuff that will never work on hardware targets.
Just as an example: we once did a scheduling prototype that runs at 100 Gbps (non P4 related) and some reviewers criticized that hardly because some backbones already operate at 400 Gbps. So research results with 10 Gbps are not interesting in most networking communities (as long as we are speaking about core nodes)
There are only a few software switches that have a „real“ hardware based counterpart, I.e. when it runs on the software switch it will run on the hardware part. I am only aware of one such software switch. In general afaik, only Tofino is a freely P4 programmable ASIC. There is Cisco One and Pensando that use P4, but that’s not open for external developers iirc.
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Thank you very much for your sharing of your experience. There are two more things I like to ask advice, please.
I understand that there is a difference in implementing the p4 program in a software switch versus a physical switch. I am more familiar now with using p4c to compile a p4 program and uploading the program onto a bmv2 for simulation experiments. I understand that to compile and upload a p4 program onto a physical switch for interaction with my application, I also will need a software development kit (SDK). I was wondering if there is any open-source simulation environment that will provide me hands on experience or a video that will allow me to understand better this process of compiling and uploading a p4 program onto a physical switch with the use of SDK?
I also really appreciate it if someone can point me to a list of P4 software FPGA targets (I am aware about netFPGA) used by the community for research and its hardware counterpart.
Thank you in advance.