I’m new to the P4 ecosystem and have been exploring the available backends for the P4C compiler. However, I haven’t found anything suitable for developing HDL for FPGAs. During my research, I discovered Xilinx’s commercial IP called Vitis Networking P4, which addresses the lack of an HDL backend. This raises the question: Are there any open-source implementations of an HDL backend available? Not everyone has access to commercial IP solutions, so open-source alternatives would be valuable.
Thanks for your quick response. I recently came across the p4fpga repository. As you mentioned, it’s old and no longer actively maintained, but it does include many important components that I can potentially reuse to develop my own HDL backend—since that currently seems like my only option.
I’m also curious about how practical it is to write Layer 4 and above (L4+) applications in P4. Is there any relevant research/examples in this area?
@panda If you are planning to go through that, I can suggest you join the P4 language working group (https://p4.org/working-groups/). Within this working group, you can find P4C experts and/or ask for guidance. Furthermore, if you would like to extend P4C with an HDL backend, you are more than welcome.