I just started with P4 on bmv2 model and I am a little bit confused about the queuing process of packets inside the “Traffic Manager” of V1 architecture. Is there such a thing like a real queue for each egress_spec inside the “Traffic Manager” consisting of multiple registers which contain the packets processed by the ingress deparser? Could someone give me a reference on that regard or explain how queuing is implemented inside the Traffic Manager of V1 architecture?
Thanks in advance!
This is not a question I can properly answer as I have never developed any part of bmv2 of the Simple Switch target. But I remember reading about similar questions compared to the one you made.
I will literally copy an answer from @antoninbas from the first link posted below, it might help with your question.
I’ll answer this question specifically for bmv2 simple_switch (every bmv2 target is free to adopt a different queuing scheme). simple_switch has an
input_bufferqueue (behavioral-model/simple_switch.h at main · p4lang/behavioral-model · GitHub). By default this queue can hold 1K packets and is blocking, meaning a write operation will block until there is an available slot. In particular this means that a resubmitted / recirculated packet can never be dropped. For incoming packets read though libpcap (for example) the write is blocking, so back-pressure will build at the Linux interface and I expect packets to be dropped there if there is more incoming traffic than simple_switch can handle.
If this doesn’t work for you, feel free to use different settings for
input_bufferor change the input queueing scheme altogether.
There isn’t really a notion of “line rate” here. The simple_switch ingress pipeline will handle packets as fast as your CPU can handle.
I can provide you a few links that might help if you have not read them yet:
- Is there an input queue in ingress port to storage packets arriving at line rate? #729
- Priority Queueing with v1model.p4 #562
- Priority Switching in V1model #401
- What is the queue management approach in P4?
- Simple_switch queue capacity #311
- BMv2 Queues: independent from qdisc? #343
- See this code line from